/******************************************************************************
 * Include files
 ******************************************************************************/
#include <stdio.h>
#include "bsp_init.h"
#include "hc32_ddl.h"
#include "hc32f460_clk.h"
#include "hc32f460_usart.h"
#include "uart.h"


/**

 
// 
///**
// * @brief  BSP clock initialize.
// *         Set board system clock to MPLL@200MHz
// * @param  None
// * @retval None
// */
//void BSP_CLK_Init(void)
//{
//    stc_clk_sysclk_cfg_t stcSysClkCfg;
//    stc_clk_xtal_cfg_t stcXtalCfg;
//    stc_clk_mpll_cfg_t stcMpllCfg;
//    stc_sram_config_t stcSramConfig;

//    MEM_ZERO_STRUCT(stcSysClkCfg);
//    MEM_ZERO_STRUCT(stcXtalCfg);
//    MEM_ZERO_STRUCT(stcMpllCfg);
//    MEM_ZERO_STRUCT(stcSramConfig);

//    /* Set bus clk div. */
//    //    stcSysClkCfg.enHclkDiv = ClkSysclkDiv1;
//    //    stcSysClkCfg.enExclkDiv = ClkSysclkDiv2;
//    //    stcSysClkCfg.enPclk0Div = ClkSysclkDiv1;
//    //    stcSysClkCfg.enPclk1Div = ClkSysclkDiv2;
//    //    stcSysClkCfg.enPclk2Div = ClkSysclkDiv4;
//    //    stcSysClkCfg.enPclk3Div = ClkSysclkDiv4;
//    //    stcSysClkCfg.enPclk4Div = ClkSysclkDiv2;
//    //    CLK_SysClkConfig(&stcSysClkCfg);

//    /* Config Xtal and Enable Xtal */
//    stcXtalCfg.enMode = ClkXtalModeOsc;
//    stcXtalCfg.enDrv = ClkXtalLowDrv;
//    stcXtalCfg.enFastStartup = Enable;
//    CLK_XtalConfig(&stcXtalCfg);
//    CLK_XtalCmd(Enable);

//    /* sram init include read/write wait cycle setting */
//    stcSramConfig.u8SramIdx = Sram12Idx | Sram3Idx | SramHsIdx | SramRetIdx;
//    stcSramConfig.enSramRC = SramCycle2;
//    stcSramConfig.enSramWC = SramCycle2;
//    SRAM_Init(&stcSramConfig);

//    /* flash read wait cycle setting */
//    EFM_Unlock();
//    EFM_SetLatency(EFM_LATENCY_5);
//    EFM_Lock();

//    /* MPLL config (XTAL / pllmDiv * plln / PllpDiv = 200M). */
//    stcMpllCfg.pllmDiv = 1ul;
//    stcMpllCfg.plln = 50ul;
//    stcMpllCfg.PllpDiv = 2ul;
//    stcMpllCfg.PllqDiv = 2ul; // 16ul;//2
//    stcMpllCfg.PllrDiv = 2ul; // 16ul;//2
//    CLK_SetPllSource(ClkPllSrcXTAL);
//    CLK_MpllConfig(&stcMpllCfg);

//    /* Enable MPLL. */
//    CLK_MpllCmd(Enable);
//    /* Wait MPLL ready. */
//    while (Set != CLK_GetFlagStatus(ClkFlagMPLLRdy))
//    {
//        ;
//    }
//    /* Switch driver ability */
//    PWC_HS2HP();
//    /* Switch system clock source to MPLL. */
//    CLK_SetSysClkSource(CLKSysSrcMPLL);
//}



#if (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || \
    (defined (__ICCARM__) && (__VER__ < 9000000)) || (defined (__CC_ARM))
/**
 * @brief  Re-target fputc function.
 * @param  [in] ch
 * @param  [in] f
 * @retval int32_t
 */
int32_t fputc(int32_t ch, FILE *f)
{
    (void)f;  /* Prevent unused argument compilation warning */

    return (LL_OK == Debug_Uart_SendDataPoll((char)ch)) ? ch : -1;
}

#elif (defined (__ICCARM__) && (__VER__ >= 9000000))

#include <LowLevelIOInterface.h>
#pragma module_name = "?__write"
size_t __dwrite(int handle, const unsigned char *buffer, size_t size)
{
    size_t nChars = 0;
    size_t i;

    if (buffer == NULL) {
        /*
         * This means that we should flush internal buffers.  Since we
         * don't we just return.  (Remember, "handle" == -1 means that all
         * handles should be flushed.)
         */
        return 0;
    }

    /* This template only writes to "standard out" and "standard err",
     * for all other file handles it returns failure. */
    if (handle != _LLIO_STDOUT && handle != _LLIO_STDERR) {
        return _LLIO_ERROR;
    }

    for (i = 0; i < size; i++) {
        if (Debug_Uart_SendDataPoll((char)buffer[i]) < 0) {
            return _LLIO_ERROR;
        }

        ++nChars;
    }

    return nChars;
}

#elif defined (__GNUC__) && !defined (__CC_ARM)

#include <sys/stat.h>
#include <unistd.h>
#include <errno.h>

__attribute__((weak)) int _isatty(int fd)
{
  if (fd >= STDIN_FILENO && fd <= STDERR_FILENO)
    return 1;
  errno = EBADF;
    return 0;
}

__attribute__((weak)) int _close(int fd)
{
  if (fd >= STDIN_FILENO && fd <= STDERR_FILENO)
    return 0;
  errno = EBADF;
    return -1;
}

__attribute__((weak)) int _lseek(int fd, int ptr, int dir)
{
  (void)fd;
  (void)ptr;
  (void)dir;

  errno = EBADF;
  return -1;
}

__attribute__((weak)) int _fstat(int fd, struct stat *st)
{
  if (fd >= STDIN_FILENO && fd <= STDERR_FILENO)
  {
    st->st_mode = S_IFCHR;
    return 0;
  }
  errno = EBADF;
  return 0;
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
  (void)file;
  int DataIdx;
  for (DataIdx = 0; DataIdx < len; DataIdx++)
  {
    ptr++ ;
  }
  return len;
}

__attribute__((weak)) void _getpid(void)
{
  ;
}

__attribute__((weak)) void _kill(void)
{
  ;
}
/**
 * @brief  Re-target _write function.
 * @param  [in] fd
 * @param  [in] data
 * @param  [in] size
 * @retval int32_t
 */
int32_t _write(int fd, char data[], int32_t size)
{
    int32_t i = -1;

    if (NULL != data) {
        (void)fd;  /* Prevent unused argument compilation warning */

        for (i = 0; i < size; i++) {
            if (LL_OK != Debug_Uart_SendDataPoll(data[i])) {
                break;
            }
        }
    }

    return i ? i : -1;
}

#endif


/******************************************************************************
 * EOF (not truncated)
 ******************************************************************************/
